Key Features
XC7Z010-1CLG400C
33.33 MHz oscillator
1 GB of DDR3 SDRAM
128 Mb of QSPI Flash
Micro SD card interface
10/100/1000 Ethernet
USB 2.0
USB-UART
100 User I/O (50 per connector)
Configurable as up to 48 LVDS pairs or 100 single-ended I/Software
Programming Adapter
Design Considerations
The board can be powered by the USB connection. For this, your USB must be able to deliver 500mA. In that case the power banks of the FPGA will not be powered.
Zynq 7000 FPGA Configuration
Processing System
In the OST linux image for the Microzed board, the Zynq 7000 processing system includes the following peripherals:
- Ethernet
- SD Card
- USB
- UART (over micro usb)
- I2C
FPGA Pin I2C Channel MIO 10 I2C scl MIO 11 sda
Programmable Logic
In addition to flink, XADC is also implemented in the PL as an AXI bus component. In addition to internal measurements, it also has I/O interfaces for external measurement.
| FPGA Pin | XADC Device | Channel |
|---|---|---|
| E17 | XADC | 0[p] |
| D18 | 0[n] | |
| M19 | 1[p] | |
| M20 | 1[n] | |
| L19 | 2[p] | |
| L20 | 2[n] | |
| B19 | 3[p] | |
| A20 | 3[n] |
Flink Configuration
- Java: choose a bit-file to load the programmable logic part (PL) or a mcs-file to load the flash. The msc file contains the bit-file together with a first stage boot loader. See https://deepjava.org/first_example for how to use these files on the Avnet MicroZed board. The files can be found in the deep runtime library under /rsc/.
- Python running on Linux: the appropriate bit-file has to be built into the Linux image.
| configu-ration | bit-file | mcs-file | flink configuration | pin mapping |
|---|---|---|---|---|
| flink1 | flink1.bit | BOOTflink1.mcs | Info Device, Description = ZedFlink 1 01.12.2023 (left adjusted) | mapping |
| GPIO Device, 89 channels | ||||
| external ADC128S102 Device, 8 ADC channels | ||||
| external AD7476 Device, 1 ADC channel | ||||
| flink2 e.g. used for REAL | flink2.bit | BOOTflink2.mcs | Info Device, Description = ZedFlink 2 01.12.2023 | mapping |
| GPIO Device, 24 channels | ||||
| PWM Device, 24 channels | ||||
| FQD Device, 8 channels | ||||
| PPWA Device, 1 channel | ||||
| external ADC128S102 Device, 8 ADC channels | ||||
| TCRT1000 Sensors with external ADC AD7476 Device | ||||
| UART Device, 2 channels | ||||
| Watchdog Device | ||||
| XADC Device, 4 channels (no flink component) | ||||
| flink3 | flink3.bit | BOOTflink3.mcs | Info Device, Description = ZedFlink 3 01.12.2023 (left adjusted) | mapping |
| GPIO Device, 4 channels | ||||
| external ADC128S102 Device, 8 ADC channels | ||||
| external AD5668 Device, 8 DAC channels | ||||
| flink4 | flink4.bit | BOOTflink4.mcs | Info Device, Description = ZedFlink 4 7.12.2021 (left adjusted) | mapping |
| FQD Device, 2 channels | ||||
| external ADC128S102 Device, 8 ADC channels | ||||
| external AD5668 Device, 8 DAC channels |