The board can be powered by the USB connection. For this, your USB must be able to deliver 500mA. In that case the power banks of the FPGA will not be powered.
In the OST linux image for the Microzed board, the Zynq 7000 processing system includes the following peripherals:
Ethernet
SD Card
USB
UART (over micro usb)
I2C
FPGA Pin
I2C
Channel
MIO 10
I2C
scl
MIO 11
sda
Programmable Logic
In addition to Flink, XADC is also implemented in the PL as an axi component. In addition to internal measurements, it also has I/O interfaces for external measurement.
FPGA Pin
XADC Device
Channel
E17
XADC
0[p]
D18
0[n]
M19
1[p]
M20
1[n]
L19
2[p]
L20
2[n]
B19
3[p]
A20
3[n]
Flink Configuration
Choose a bit-file to load the programmable logic part (PL) or a mcs-file to load the flash. The msc file contains the bit-file together with a first stage boot loader. Seehttps://deepjava.org/first_examplefor how to use these files on the Avnet MicroZed board. The files can be found in thedeep runtime libraryunder /rsc/
configuration
bit-file
mcs-file
flink configuration
pin mapping
flink1
flink1.bit
BOOTflink1.mcs
Info Device, Description = ZedFlink 1 01.12.2023 (left adjusted)