Key Features
XC7Z010-1CLG400C
33.33 MHz oscillator
1 GB of DDR3 SDRAM
128 Mb of QSPI Flash
Micro SD card interface
10/100/1000 Ethernet
USB 2.0
USB-UART
100 User I/O (50 per connector)
Configurable as up to 48 LVDS pairs or 100 single-ended I/Software
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Design Considerations
The board can be powered by the USB connection. For this, your USB must be able to deliver 500mA. In that case the power banks of the FPGA will not be powered.
Zynq 7000 FPGA Configuration
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Flink Configuration
Choose a bit-file to load the programmable logic part (PL) or a mcs-file to load the flash. The msc file contains the bit-file together with a first stage boot loader. See https://deepjava.org/first_example for how to use these files on the Avnet MicroZed board. The files can be found in the deep runtime library under /rsc/
